Role of PEI Modules in UEFI Initialization

Pre-EFI Initialization Modules (PEIMs) are critical components that operate during the early Pre-EFI Initialization (PEI) phase of the UEFI boot process. Because main system memory is not yet available when the system powers on, these small, specialized drivers execute in a temporary memory environment to configure critical platform hardware, initialize system RAM, and package system state data into Hand-Off Blocks (HOBs). By handling these foundational tasks, PEIMs prepare the platform for the subsequent Driver Execution Environment (DXE) phase, enabling the full execution of complex drivers and the operating system loader.

The PEI phase begins immediately after the Security (SEC) phase, where the platform verifies initial code integrity and configures the processor's L1/L2 cache to act as temporary storage, known as Cache-as-RAM (CAR). Operating under the management of the PEI Foundation (or PEI Core), PEIMs execute within this severely constrained memory footprint. Their primary objective is to configure the minimum set of hardware components required to wake the system and initialize permanent physical memory.

Inter-module communication during this phase is governed by PEIM-to-PEIM Interfaces (PPIs). Since the formal protocol database used in later UEFI stages does not yet exist, PPIs serve as lightweight service interfaces. One PEIM can publish a PPI to provide specialized hardware services, such as register access or GPIO manipulation, which other PEIMs can locate and consume. This modular structure allows hardware vendors to isolate chip-specific code, such as memory controllers or CPU power management, into distinct, reusable units.

One of the most vital tasks handled by a dedicated memory initialization PEIM is training and establishing system DRAM. This process includes detecting memory modules, configuring timings, voltages, and bus signals, and verifying stability. Once the memory controller is active and system memory is online, the PEI Core transitions execution from Cache-as-RAM to actual physical memory, dramatically expanding the execution space.

In addition to memory training, PEIMs determine the boot path, distinguishing between a cold boot, warm restart, or an S3 sleep-state resume. If an S3 resume is detected, specific PEIMs restore the saved system state and bypass subsequent standard boot phases to quickly return control to the operating system.

Finally, as the PEI phase nears completion, PEIMs synthesize the platform’s hardware status into a structured data list known as Hand-Off Blocks (HOBs). These HOBs describe the physical memory map, discovered hardware resources, and firmware volumes. With the HOB list finalized and main memory fully operational, the final architectural PEIM locates and invokes the DXE Core, successfully passing control to the broader UEFI driver environment.