Query CPU Topology and Cache in UEFI Applications

UEFI applications query CPU topology and cache architecture by leveraging firmware-provided protocols, executing low-level CPU instructions directly, and parsing system description tables. Because UEFI applications operate in a privileged execution environment (typically Ring 0 on x86 platforms), developers can combine high-level firmware interfaces like the EFI_MP_SERVICES_PROTOCOL and SMBIOS protocols with native hardware instructions such as CPUID, or inspect ACPI tables directly from system memory to map cores, threads, NUMA nodes, and cache hierarchies.

1. Using the EFI_MP_SERVICES_PROTOCOL

The standard approach within the UEFI framework is locating and consuming the EFI_MP_SERVICES_PROTOCOL. This protocol abstracts multiprocessor initialization and management.

An application locates the protocol using the UEFI Boot Services table:

EFI_STATUS Status;
EFI_MP_SERVICES_PROTOCOL *MpServices;

Status = gBS->LocateProtocol(
    &gEfiMpServiceProtocolGuid,
    NULL,
    (VOID **)&MpServices
);

Once the protocol interface is acquired:

  • GetNumberOfProcessors: Returns the total number of logical processors and the number of currently enabled processors.
  • GetProcessorInfo: Accepts a processor index and populates an EFI_PROCESSOR_INFORMATION structure.

The EFI_PROCESSOR_INFORMATION structure provides critical topology fields:

  • ProcessorId: The unique physical ID (usually matching the Local APIC ID).
  • StatusFlag: Indicates if the processor is the Bootstrap Processor (BSP) or an Application Processor (AP), and whether it is enabled.
  • Location: An EFI_CPU_PHYSICAL_LOCATION struct containing package (socket), core, and thread indexes. On newer UEFI specifications, ExtendedInformation can also map multi-die packages and module-level hierarchies.

2. Direct Hardware Querying via CPUID (x86/x86-64)

Because UEFI applications run in 64-bit flat-memory mode without OS-level sandboxing, they can directly execute the CPUID assembly instruction using compiler intrinsics (such as __cpuid or __cpuidex).

CPU Topology Discovery

  • Leaf 0x0B and Leaf 0x1F (Extended Topology Enumeration): Intel and modern AMD architectures use these leaves to define thread, core, and module topology. By iterating sub-leaves (ECX = 0, 1, 2...), the application reads EAX (shift count to derive higher-level IDs), EBX (number of logical processors at this level), and EDX (x2APIC ID of the current logical processor).
  • Leaf 0x8000001E (AMD Extended Topology): On AMD systems, this leaf provides the compute unit ID, core ID, and node (socket/NUMA) ID.

Cache Architecture Discovery

  • Leaf 0x04 (Deterministic Cache Parameters): Intel and modern AMD processors report detailed cache layouts using this leaf. Setting EAX = 0x04 and varying ECX (cache level index starting at 0) returns:
    • Cache type (Data, Instruction, or Unified) in EAX[4:0].
    • Cache level (L1, L2, L3) in EAX[7:5].
    • Number of threads sharing this cache in EAX[25:14] + 1.
    • Ways of associativity, line size, and total sets via EBX and ECX.
  • Leaf 0x8000001D: Dedicated cache topology parameter leaf used by AMD processors providing identical layout details for Zen-based architectures.

3. Parsing SMBIOS Tables

The UEFI system configuration table provides access to SMBIOS (System Management BIOS) structures, which contain static, human-readable information prepared by the platform initialization firmware.

An application can locate SMBIOS through gBS->LocateProtocol(&gEfiSmbiosProtocolGuid, ...) or by searching gST->ConfigurationTable for SMBIOS_TABLE_GUID or SMBIOS3_TABLE_GUID.

  • Type 4 (Processor Information): Contains core count, thread count, external clock frequencies, socket designation, and references to associated cache handles.
  • Type 7 (Cache Information): Lists operational mode, maximum cache size, installed cache size, supported SRAM types, error correction types, and cache level associative properties.

4. Reading ACPI Tables (MADT and PPTT)

For platform-independent topology mappings—especially on AArch64 (ARM) platforms where CPUID is absent—UEFI applications locate the ACPI Root System Description Pointer (RSDP) in the UEFI System Configuration Table.

  • MADT (Multiple APIC Description Table): On x86, it lists every Local APIC and x2APIC entry, confirming valid hardware execution targets and physical core mappings.
  • PPTT (Processor Properties Topology Table): Essential on modern systems, PPTT describes the exact physical processor hierarchy (sockets, clusters, cores, threads) and defines the exact cache hierarchy associated with each node using standard cache attribute structures.