How Does the OpenCL Platform Model Work?

The OpenCL platform model provides an abstract representation of heterogeneous computing environments, establishing how execution tasks and physical hardware are mapped across a computing system. Under this architecture, the environment is organized into a hierarchical relationship consisting of a single central host coordinating execution across one or more compute devices. Each compute device is subsequently partitioned into compute units, which are further divided into processing elements. This structural breakdown enables unified control over diverse hardware types such as multi-core CPUs, graphics processing units (GPUs), digital signal processors (DSPs), and specialized hardware accelerators.

The Host System

The host acts as the central coordinator and master controller within the OpenCL topology. It typically runs on a standard CPU and operating system, executing the primary application code.

Rather than participating directly in fine-grained data-parallel computations by default, the host is responsible for orchestrating the overall execution pipeline:

Compute Devices

An OpenCL compute device is an independent compute-capable hardware component attached to the host processor. An individual system can host several distinct compute devices simultaneously, even across mixed architectures.

OpenCL classifies devices using standard device-type identifiers:

The Internal Hierarchy: Compute Units and Processing Elements

To provide a consistent execution target across fundamentally different architectures, the OpenCL platform model abstracts compute devices into a two-level internal hierarchy:

Compute Units (CUs)

A compute device consists of one or more compute units. A compute unit functions as a localized execution core within the device. In GPU architecture, a compute unit corresponds to a hardware streaming multiprocessor or compute engine, while on a multicore CPU, it generally maps to an individual CPU core. Compute units contain dedicated scheduling logic and shared hardware structures, including local scratchpad memory and barrier synchronization mechanisms shared by their underlying execution pipelines.

Processing Elements (PEs)

Each compute unit is further divided into one or more processing elements. The processing element is the fundamental execution unit responsible for running the individual stream of instructions (a work-item) in SIMD (Single Instruction, Multiple Data) or SPMD (Single Program, Multiple Data) fashion. On a modern GPU, processing elements correspond to individual SIMD vector lanes or ALU execution cores within a multiprocessor. Each processing element maintains its own private registers and memory space that cannot be accessed by other processing elements.

Mapping the Platform Model to Execution

This structural categorization directly reflects OpenCL's execution model:

Through this abstraction, OpenCL separates high-level coordination handled by the host CPU from parallel compute tasks distributed across hardware-agnostic processing units.