Why Dual-Link DVI Cables Use Six TMDS Pairs
Dual-link DVI cables utilize six Transition-Minimized Differential Signaling (TMDS) data pairs to double the transmission bandwidth of standard single-link DVI. By splitting the video signal across two physical transmission paths operating in parallel, dual-link DVI overcomes the frequency limitations of early digital display standards. This design allows the interface to support resolutions up to 2560×1600 at 60 Hz or 1080p at 144 Hz without altering the fundamental signaling protocol.
The Single-Link Baseline
To understand why dual-link DVI requires six data pairs, it helps to examine single-link DVI. Digital Visual Interface (DVI) uses TMDS technology to transmit high-speed serial data over twisted copper pairs. In a standard single-link setup, the cable contains four TMDS pairs:
- Three TMDS data pairs, each dedicated to carrying digital color data (one pair for Red, one for Green, and one for Blue).
- One TMDS clock pair, which provides a frequency reference to keep the transmitter and receiver synchronized.
Standard single-link DVI operates at a maximum pixel clock rate of 165 MHz, yielding a combined data throughput of approximately 3.96 Gbps. This bandwidth is sufficient for displays up to 1920×1200 at 60 Hz.
The Dual-Link Architecture
As display resolutions advanced beyond 1080p and 1200p, single-link DVI could no longer provide enough data per second. Rather than simply increasing the clock frequency—which would have created severe electromagnetic interference (EMI) and transmission loss over standard copper wiring—the Digital Display Working Group (DDWG) designed the dual-link specification.
Dual-link DVI adds a secondary digital transmitter and receiver into the physical connector:
- Link 1: Uses the original three TMDS data pairs (Red, Green, Blue).
- Link 2: Adds three additional TMDS data pairs (a second channel for Red, Green, and Blue).
Combined, these two links account for the six TMDS data pairs found in a dual-link DVI cable. Both links share the single, original TMDS clock pair, eliminating the need to duplicate the clock signal while ensuring strict phase synchronization across all six data lanes.
How the Six Pairs Transmit Data
When dual-link mode is active, the graphics processor alternates pixel data between the two links. Link 1 typically transmits the odd-numbered pixels of a horizontal scan line, while Link 2 simultaneously transmits the even-numbered pixels. The display receiver then recombines these interleaved streams into a single, cohesive frame buffer before rendering the image.
By doubling the physical data lanes from three to six, dual-link DVI effectively doubles maximum throughput to 7.92 Gbps, enabling higher resolutions, higher refresh rates, and expanded color depths while maintaining electrical stability.