What Is Reduced Blanking in DVI?

Reduced blanking is a video timing technique that minimizes the inactive transmission intervals between lines and frames of video data, catering specifically to digital flat-panel displays. By cutting out the overhead originally required by older cathode-ray tube (CRT) monitors, reduced blanking substantially decreases the total data throughput required for a given display mode. This bandwidth reduction allows legacy digital interfaces, particularly single-link DVI, to push higher resolutions and refresh rates that would otherwise exceed hardware bandwidth limits.

The Origin of Blanking Intervals

In traditional CRT monitors, a physical electron beam sweeps horizontally across the screen to illuminate phosphors line by line, then resets from the bottom back to the top. The beam needs time to reposition itself without drawing visible lines across the screen. These transition periods are known as:

  • Horizontal Blanking: The pause required for the beam to travel from the end of one line to the beginning of the next (horizontal retrace).
  • Vertical Blanking: The pause required for the beam to move from the bottom-right corner back to the top-left to start a new frame (vertical retrace).

During these blanking intervals, synchronization signals are sent, but no visible image data is transmitted. Despite carrying no picture information, this "dead time" is factored into the total pixel clock and bandwidth calculations.

How Reduced Blanking Works

Liquid crystal displays (LCDs) and other modern digital panels do not use electron beams. Pixels are held in memory and updated digitally, making the lengthy physical retrace delays obsolete.

To capitalize on this, the Video Electronics Standards Association (VESA) introduced Coordinated Video Timings-Reduced Blanking (CVT-RB). Reduced blanking drastically shortens both horizontal and vertical blanking intervals to the minimum duration necessary to maintain clock synchronization. Instead of wasting 20% to 30% of total bandwidth on empty retrace time, reduced blanking recaptures that transmission space for active video data.

Overcoming DVI Bandwidth Limits

Digital Visual Interface (DVI) utilizes Transition-Minimized Differential Signaling (TMDS). Single-link DVI operates with a strict hardware limit: a maximum pixel clock frequency of 165 MHz, yielding a total bandwidth ceiling of roughly 3.96 Gbps (or 4.95 Gbps including encoding overhead).

Standard CRT-compatible timings generate total pixel counts that quickly exceed this 165 MHz threshold at high display resolutions:

  • Standard Blanking at 1920×1200 (60 Hz): Standard timings add a significant number of blanking pixels to the signal, pushing the required pixel clock to roughly 193 MHz. Because 193 MHz surpasses the 165 MHz limit of single-link DVI, the connection fails, requiring either a drop in refresh rate or expensive dual-link DVI cables and hardware.
  • Reduced Blanking at 1920×1200 (60 Hz): With CVT-RB, the non-visible overhead is trimmed. The total number of pixels transmitted per second drops, lowering the required pixel clock to approximately 154 MHz.

Because 154 MHz is comfortably below the 165 MHz ceiling, single-link DVI cables and transmitters can natively drive a 1920×1200 display at a full 60 Hz without visual compression or hardware upgrades.

Key Benefits

  • Higher Resolutions on Single-Link DVI: Enables 1920×1200 at 60 Hz and higher refresh rates at 1080p over single-link cables.
  • Hardware Compatibility: Extends the usability of older graphics cards, KVM switches, and displays limited to single-link DVI inputs.
  • Signal Integrity: Operating at lower clock frequencies minimizes signal degradation and electromagnetic interference across longer cable runs.