How OSSC Converts Analog Signals to DVI

The Open Source Scan Converter (OSSC) is a low-latency video digitizer and scan converter designed primarily for retro video game consoles and vintage computers. This article explains how the OSSC takes legacy analog video formats—such as RGB, Component, and VGA—and converts them into modern digital DVI and HDMI formats. You will learn about the hardware pipeline, including analog signal digitization, line-multiplication processing via an FPGA, and final digital video encoding, all performed without introducing input lag.

1. Analog Signal Ingestion and Conditioning

The process begins when an analog video source connects to one of the OSSC's physical inputs: SCART (RGBS/RGsB), Component (YPbPr), or VGA (RGBHV).

Before conversion, the incoming signal passes through input conditioning circuitry. This step includes:

  • Termination and Attenuation: Matching standard impedance (typically 75 ohms) to preserve signal integrity.
  • Low-Pass Filtering (LPF): Filtering out high-frequency noise that can cause artifacts or shimmering in the digital image.
  • Sync Separation: Extracting synchronization signals (horizontal and vertical sync) from composite sync or sync-on-green lines to determine accurate frame boundaries.

2. Analog-to-Digital Conversion (ADC)

Once conditioned, the analog voltages are sent to a high-speed video analog-to-digital converter, specifically the Texas Instruments TVP7002 chip.

The ADC samples the continuous analog voltage levels of the red, green, and blue (or YPbPr) color channels at exact pixel intervals. It translates these voltage levels into raw 24-bit digital parallel data (8 bits per channel). The sampling clock is synchronized to the source's horizontal refresh rate using a phase-locked loop (PLL), ensuring sharp, accurately sampled pixels rather than blurred approximations.

3. FPGA Processing and Line Multiplication

Unlike conventional scalers that store entire frames in memory (introducing several frames of latency), the OSSC relies on an Intel/Altera Cyclone IV Field-Programmable Gate Array (FPGA) to process video in real time.

The FPGA holds only a few scanlines in its internal buffer at any given time. It processes the digital video using line multiplication techniques:

  • Line Passthrough (1x): Sends the digitized scanlines directly to the output at their original resolution (useful for 480p sources).
  • Line Multiplication (Line2x, Line3x, Line4x, Line5x): Re-transmits each horizontal scanline multiple times. For example, a 240p signal multiplied by two (Line2x) duplicates each line to output a progressive 480p signal. Line5x scales 240p up to 1200p or 1080p.
  • Scanline Generation: The FPGA can also insert artificial black or dimmed lines between doubled lines to recreate the visual appearance of a classic CRT display.

Because the FPGA acts on the incoming scanlines almost instantaneously without waiting for a full frame to buffer, total processing lag remains virtually zero (measured in a few scanlines, or microseconds).

4. DVI Encoding and Transmission

After line multiplication, the parallel digital video data and reconstructed sync pulses are converted into a format suitable for modern displays.

The OSSC formats the data into the DVI-D specification:

  • Color Space Conversion: If the input was YPbPr (Component), the FPGA or video encoder converts the colors to digital RGB.
  • TMDS Serialization: The digital color and clock data are converted into Transition-Minimized Differential Signaling (TMDS), the physical layer protocol used by DVI and HDMI.
  • Output: The signals are routed to a physical DVI or HDMI-compatible connector.

Because DVI video is electrically compatible with HDMI video signals, the OSSC can output directly to standard modern monitors and televisions using a passive adapter or an HDMI cable, delivering a clean, low-latency digital picture directly derived from vintage analog hardware.