How Monitors Power EDID EEPROM via DVI +5V

Modern computers can detect a display's supported resolutions, timings, and manufacturer details even when the monitor is turned off or unplugged from the wall. This capability relies on Extended Display Identification Data (EDID) stored inside an onboard Electrically Erasable Programmable Read-Only Memory (EEPROM) chip. The graphics card reads this data by supplying power directly to the monitor's EDID circuitry through the DVI cable's dedicated +5V line, bypassing the display’s main internal power supply entirely.

The Digital Visual Interface (DVI) standard reserves Pin 14 specifically for +5V power provided by the host graphics adapter, alongside Pin 15 as its ground return. DVI specifications mandate that the graphics card must deliver a minimum of 55 mA at +5V on this pin. Because an EDID EEPROM chip (typically a standard 24C02 or compatible I2C memory device) draws only a few microamps in standby and a few milliamperes during active read cycles, the host's +5V line provides more than enough energy to power the chip independently.

To safely allow both the computer and the monitor’s own internal power supply to power the EEPROM without causing short circuits or back-feeding electricity into the monitor, circuit designers implement a "diode-OR" power isolation circuit. In this configuration, two low-forward-voltage Schottky diodes (or a specialized power multiplexer IC) merge at the EEPROM's VCC power pin:

1. One diode's anode connects to the DVI connector’s Pin 14 (+5V from the host).
2. The second diode's anode connects to the monitor's internal regulated power rail (typically +5V or +3.3V).
3. Both cathodes connect together to feed the VCC pin of the EEPROM.

When the monitor is powered off or unplugged from AC mains, the internal power rail sits at 0V. The diode attached to the internal rail reverse-biases, blocking current from escaping into the monitor's unpowered motherboards and backlights. Meanwhile, the diode connected to DVI Pin 14 forward-biases, allowing current from the host PC to energize only the EEPROM and its pull-up resistors. When the monitor is powered on, the monitor's internal supply typically takes over if it provides a slightly higher voltage, preventing drain on the host.

Once energized, communication occurs over the Display Data Channel (DDC2B), an implementation of the I2C serial protocol. The host utilizes DVI Pin 7 (Data / SDA) and Pin 6 (Clock / SCL) to query the EEPROM's 256-byte memory table. Because both the power rail and the communication lines are maintained by the graphics adapter, the operating system can seamlessly negotiate display capabilities, configure desktop arrangements, and prepare display drivers before the user ever presses the monitor's power button.