How Dual-Link DVI Distributes TMDS Color Channels

Dual-link DVI doubles video bandwidth not by splitting color components across separate cables, but by interleaving alternating pixels across two sets of data lanes. This article explains how dual-link DVI maps red, green, and blue color channels across its six Transition Minimized Differential Signaling (TMDS) data pairs, utilizing a shared clock to display high-resolution video seamlessly.

To understand dual-link DVI, it is necessary to look at the baseline single-link configuration. A standard single-link DVI connection utilizes three TMDS data pairs (Channels 0, 1, and 2) alongside a single dedicated TMDS clock pair:

  • TMDS Channel 0: Carries the 8-bit Blue color data, combined with horizontal and vertical synchronization signals (HSync and VSync) during blanking intervals.
  • TMDS Channel 1: Carries the 8-bit Green color data.
  • TMDS Channel 2: Carries the 8-bit Red color data.

In this mode, full 24-bit RGB color information for each consecutive pixel is transmitted serially across these three differential pairs in parallel.

When video resolution or refresh rates exceed the throughput of a single link (typically pixel clocks above 165 MHz), dual-link mode activates. Dual-link DVI incorporates three additional TMDS data pairs—Channels 3, 4, and 5—bringing the total to six differential data pairs.

Rather than sending different color components (such as higher color depths) over the secondary link, dual-link DVI distributes color channels by alternating pixels spatially along each scanline. The transmission alternates horizontally across the display line: Link 1 processes odd-numbered pixels, while Link 2 processes even-numbered pixels.

Channel-by-Channel Color Distribution

Across the six physical TMDS data pairs, standard 24-bit RGB color channels are allocated as follows:

  • TMDS Channel 0 (Link 1): Transmits the Blue component of odd pixels (Pixel 0, Pixel 2, Pixel 4, etc.), as well as the HSync and VSync control signals.
  • TMDS Channel 1 (Link 1): Transmits the Green component of odd pixels.
  • TMDS Channel 2 (Link 1): Transmits the Red component of odd pixels.
  • TMDS Channel 3 (Link 2): Transmits the Blue component of even pixels (Pixel 1, Pixel 3, Pixel 5, etc.).
  • TMDS Channel 4 (Link 2): Transmits the Green component of even pixels.
  • TMDS Channel 5 (Link 2): Transmits the Red component of even pixels.

Clocking and Frame Reconstruction

Both links share a single TMDS clock pair. Because pixels are distributed between two parallel transmission paths, the clock operates at half the effective pixel frequency. For instance, transmitting a display signal with a 330 MHz pixel rate requires the shared TMDS clock line to run at only 165 MHz.

At the receiving display, the internal DVI receiver captures the synchronized color data from all six pairs simultaneously. The receiver demultiplexes the odd-pixel data from Channels 0–2 and the even-pixel data from Channels 3–5, recombining them in sequential order to render the full, continuous scanline.