How CVT-RB Enables 2560x1440 on Single-Link DVI
This article explains how VESA’s Coordinated Video Timings-Reduced Blanking (CVT-RB) standard allows high-resolution 2560x1440 (1440p) video to transmit across single-link DVI connections. By drastically shrinking the inactive transmission cycles historically required by cathode-ray tube (CRT) monitors, CVT-RB reduces the pixel clock demand, allowing modern digital displays and graphics transmitters to push 1440p resolutions across single-link physical interfaces.
The Single-Link DVI Bandwidth Constraint
Single-link DVI relies on three Transition-Minimized Differential Signaling (TMDS) data channels for carrying red, green, and blue video data, alongside a dedicated TMDS clock channel. Under the official DVI 1.0 specification, a single-link connection operates at a maximum pixel clock frequency of 165 MHz, which yields a maximum throughput of roughly 3.96 Gbps (or 4.95 Gbps including 8b/10b encoding overhead).
Standard video timings for 2560x1440 at 60 Hz require a pixel clock well above 240 MHz. Because this exceeds the 165 MHz threshold, standard 1440p video traditionally mandates a dual-link DVI connection, which doubles the TMDS data channels to six to handle the necessary throughput.
The Role of Blanking Intervals
In standard video timing profiles, the pixel clock does not simply account for visible pixels (the active display area). It also accounts for blanking intervals: the horizontal blanking interval (HBI) and vertical blanking interval (VBI).
These blanking periods represent the time when no visible image is drawn. They were originally required by CRT monitors to give the electron beam physical time to move from the end of one scanline to the start of the next (horizontal retrace), and from the bottom-right corner back to the top-left corner (vertical retrace). During these intervals, legacy signals also embedded synchronization pulses.
Even though digital flat panels (such as LCDs and OLEDs) do not use physical electron beams and hold pixel states natively, legacy timing standards retained these large blanking intervals for backward compatibility, consuming significant signal bandwidth with inactive data.
How CVT-RB Minimizes Overhead
The VESA Coordinated Video Timings-Reduced Blanking (CVT-RB) standard addresses this inefficiency by redesigning signal timing exclusively for digital displays:
- Shortened Horizontal Blanking: Traditional timings allocate substantial horizontal front porches, sync pulses, and back porches. CVT-RB reduces the horizontal blanking interval to a fixed, minimal period (typically 160 clock cycles).
- Optimized Vertical Blanking: Vertical sync and porch durations are reduced to the absolute minimum necessary for digital receiver logic to maintain frame synchronization.
By eliminating this dead transmission time, the total frame size (active pixels plus blanking pixels) is reduced significantly, which lowers the required pixel clock frequency for any given resolution and refresh rate.
Making 2560x1440 Viable on Single-Link Connections
CVT-RB makes 2560x1440 viable across single-link connections through two primary implementations:
- Lower Refresh Rates Within the 165 MHz Limit: Using standard timings, 2560x1440 cannot fit under the 165 MHz single-link ceiling even at reduced refresh rates like 40 Hz. With CVT-RB, the total pixel calculation drops substantially. At refresh rates between 30 Hz and 40 Hz, CVT-RB lowers the required pixel clock to roughly 120–160 MHz, fitting directly inside the strict 165 MHz DVI 1.0 hardware limit without exceeding specification boundaries.
- Reduced Clock Requirements on High-Speed TMDS Transmitters: Many modern graphics cards and display controllers integrate TMDS transmitters capable of running far beyond the legacy 165 MHz limit on a single physical link—often up to 225 MHz or 340 MHz (speeds aligned with HDMI 1.3/1.4 standards, which use the same underlying physical signaling as DVI). Standard 2560x1440 at 60 Hz requires roughly 241 MHz to over 300 MHz depending on the timing formula. Applying CVT-RB compresses the required clock for 1440p @ 60 Hz down to approximately 241.5 MHz (and down to ~235 MHz under CVT-RB v2). This falls within the operational limits of many modern single-link transmitters and receiver scalers configured via custom resolutions or driver patches, allowing full 60 Hz 1440p operation without requiring the second physical DVI link.