How Split-Frame Rendering Works in Multi-GPU DirectX

Split-frame rendering (SFR) is a spatial multi-GPU technique that accelerates real-time graphics by dividing a single frame's viewport into distinct geometric regions, assigning each slice to a separate graphics card. Unlike Alternate Frame Rendering (AFR), which delegates entire sequential frames to individual GPUs and often introduces input latency, SFR processes every frame cooperatively in real time. This article breaks down how SFR partitions viewport workloads across multi-GPU DirectX configurations, detailing the mechanics of viewport slicing, dynamic load balancing, geometry handling, and final frame compositing.

Viewport Slicing and Scissor Rectangles

In modern graphics APIs, the screen space is defined by the viewport and scissor rectangles. Under SFR, the host application or graphics driver configures the primary render target boundaries identically across participating GPUs but modifies the active rasterization window for each device.

In a dual-GPU DirectX setup, the viewport is typically split horizontally into top and bottom regions, though vertical splits can also be implemented:

  • DirectX 11 (Driver-Managed): The display driver intercepts rendering commands and injects custom scissor rects (RSSetScissorRects) and viewport offsets (RSSetViewports), constraining pixel shading to designated physical halves of the display.
  • DirectX 12 (Explicit Multi-Adapter): The developer manages spatial partitioning directly via separate command lists. Each GPU adapter executes draw calls restricted to its assigned screen-space bounds using its own dedicated command queues.

Dynamic Load Balancing

Rendering workloads are rarely uniform across a screen. The lower portion of a frame often features complex geometry, dense foliage, and detailed character models, while the upper portion may primarily contain skyboxes and post-process lighting. A static 50/50 split would cause the primary GPU handling the complex half to stall while the secondary GPU sits idle.

To maintain frame pacing, DirectX SFR implementations employ dynamic load balancing:

  1. Hardware Timer Queries: DirectX timestamp queries (D3D12_QUERY_TYPE_TIMESTAMP) measure the execution duration of each slice on its respective adapter.
  2. Boundary Adjustment: If one GPU's execution time exceeds the other by a predetermined delta, the partitioning boundary shifts vertically for the subsequent frame.
  3. Equilibrium Target: The algorithm continuously modulates the split line (e.g., 60/40, 45/55) to equalize rasterization and pixel shading workloads between the hardware units.

Geometry Pipeline Redundancy

While SFR excels at dividing pixel-shading costs, geometry processing introduces an inherent bottleneck. Because 3D objects frequently intersect the boundary between viewports, primitive culling cannot always occur before vertex transformation.

Consequently, both GPUs must execute the vertex, hull, and domain shading stages for the entire scene (or large overlapping bounding boxes) to ensure objects spanning the split line render seamlessly. Once triangles pass the geometry stage, hardware viewport clipping and scissoring discard primitives that fall outside a GPU’s designated region before the pixel shading stage begins. This makes SFR highly effective for fill-rate and pixel-shader-bound games, but minimally effective for scenes bound by heavy vertex pipelines.

Inter-GPU Synchronization and Final Compositing

Once each GPU completes the rasterization and post-processing of its designated viewport partition, the disparate render segments must be stitched together for display.

In DirectX 12 Explicit Multi-Adapter configurations, this compositing sequence follows a structured pipeline:

  1. Cross-Adapter Resources: The application creates a cross-adapter shared heap (D3D12_HEAP_FLAG_SHARED_CROSS_ADAPTER) accessible by both the primary (display-connected) and secondary GPUs.
  2. Data Transfer: The secondary GPU copies its finished frame section to the shared resource. The primary GPU executes a copy command via its direct memory access (DMA) copy queue across the PCIe bus or high-speed bridge (such as NVLink).
  3. Fence Synchronization: Cross-adapter fences ensure the transfer does not overwrite data currently in flight, and verify that the secondary GPU's work is fully resolved before compositing begins.
  4. Final Blit and Presentation: The primary GPU blits (block transfers) the secondary GPU's partial buffer into the main swap chain's back buffer alongside its own rendered slice. The unified frame is then passed to the DirectX presentation engine (IDXGISwapChain::Present) for output to the display.