DirectX 12 Async Compute Hardware Queue Requirements

Asynchronous compute in DirectX 12 enables modern GPUs to maximize hardware utilization by executing graphics, compute, and memory transfer operations concurrently rather than in sequence. To achieve true simultaneous execution rather than time-sliced context switching, a GPU must possess dedicated, independent hardware command engines capable of processing distinct queue types concurrently. This article outlines the specific hardware queue types required to deliver true asynchronous compute performance under DirectX 12.

1. Direct (3D) Queue

In DirectX 12, this is represented by D3D12_COMMAND_LIST_TYPE_DIRECT. At the hardware level, this queue maps to the primary 3D graphics pipeline. It handles the complete rasterization pipeline, including draw calls, depth/stencil operations, geometry processing, pixel shading, and dispatching compute shaders. To support asynchronous compute, the hardware must treat this queue as an independent path that does not block or wait on compute-only pipelines unless explicitly synchronized via fence primitives.

2. Compute Queue

Represented by D3D12_COMMAND_LIST_TYPE_COMPUTE, this queue bypasses the graphics, geometry, and rasterization hardware entirely. To achieve true asynchronous compute, the GPU must have dedicated hardware compute engines—such as AMD's Asynchronous Compute Engines (ACE) or NVIDIA's independent hardware compute schedulers—running alongside the 3D engine. These hardware units must be able to schedule compute dispatches to vacant execution units (ALUs/SIMDs) while the Direct queue is simultaneously running rasterization or rendering passes.

3. Copy (Transfer) Queue

Represented by D3D12_COMMAND_LIST_TYPE_COPY, this queue maps directly to the GPU's dedicated DMA (Direct Memory Access) engines. While asynchronous compute primarily revolves around the simultaneous operation of the Direct and Compute queues, a dedicated hardware Copy engine is critical to prevent memory transfers (such as uploading textures or streaming geometry) from stalling the compute or graphics engines.

Requirements for True Simultaneous Execution

For a GPU to execute these operations simultaneously rather than serially:

• Independent Hardware Scheduling: The GPU silicon must feature physically discrete command processors or microcode-driven hardware schedulers for both the 3D engine and one or more compute engines.
• Concurrent Dispatch Support: The driver and hardware architecture must support multi-engine execution, allowing waves or warps from both a Direct command list and a Compute command list to occupy the execution units simultaneously. If a GPU relies on a single hardware command processor, it will merely interleave workloads via software context switching, which introduces latency rather than achieving true asynchronous compute.