How Does a Half Adder Use XOR and AND Gates?
A half adder is a fundamental digital logic circuit that adds two single binary digits, or bits, and produces two outputs: a sum bit and a carry bit. By combining an XOR gate and an AND gate in parallel, the half adder handles all four possible combinations of two-bit binary addition.
Inputs and Outputs of a Half Adder
In classical computing, a half adder takes two binary inputs, commonly labeled \(A\) and \(B\), where each input can be either \(0\) or \(1\). Because adding \(1 + 1\) in binary equals \(10_2\), a single output bit is not enough to represent the result. To solve this, the circuit provides two outputs:
- Sum (\(S\)): Represents the least significant bit (the ones place) of the addition.
- Carry (\(C\)): Represents the most significant bit (the twos place) that overflows into the next column.
Role of the XOR Gate
The XOR (exclusive OR) gate is responsible for computing the Sum (\(S\)) output. An XOR gate outputs \(1\) only when its two inputs are different, and \(0\) when they are the same.
\[S = A \oplus B\]
When adding two bits:
- \(0 + 0 = 0\), so \(0 \oplus 0 = 0\).
- \(0 + 1 = 1\), so \(0 \oplus 1 = 1\).
- \(1 + 0 = 1\), so \(1 \oplus 0 = 1\).
- \(1 + 1 = 10_2\), so the ones place is \(0\), which matches \(1 \oplus 1 = 0\).
Role of the AND Gate
The AND gate is responsible for computing the Carry (\(C\)) output. An AND gate outputs \(1\) only when both of its inputs are \(1\), and \(0\) in all other cases.
\[C = A \cdot B\]
When adding two bits, a carry is only generated when both inputs are \(1\) (\(1 + 1 = 10_2\)). In that case, \(1 \cdot 1 = 1\), which sets the carry bit to \(1\). For all other input combinations, \(C = 0\).
Truth Table
Combining the XOR gate and the AND gate in parallel gives the complete behavior of the half adder:
| Input \(A\) | Input \(B\) | Carry (\(C = A \cdot B\)) | Sum (\(S = A \oplus B\)) |
|---|---|---|---|
| \(0\) | \(0\) | \(0\) | \(0\) |
| \(0\) | \(1\) | \(0\) | \(1\) |
| \(1\) | \(0\) | \(0\) | \(1\) |
| \(1\) | \(1\) | \(1\) | \(0\) |
Why It Is Called a Half Adder
The circuit is called a half adder because it only accepts two input bits (\(A\) and \(B\)) and has no input for a carry-in bit from a previous addition. While it works on its own for adding the least significant bits of two binary numbers, multi-bit addition requires chaining full adders—circuits built from two half adders and an OR gate—to propagate carry bits across larger numbers.