How Do Photonic Chips Perform Linear Algebra With Light?
Photonic computing uses integrated optical circuits to perform matrix-vector multiplication at the speed of light. By routing laser light through microscopic silicon waveguides and Mach-Zehnder interferometers, classical photonic processors execute linear algebra operations with ultra-low latency and minimal energy loss. Instead of moving electrical charges through transistors, these systems encode numbers into the amplitude and phase of light waves, letting physical interference compute mathematical results passively as the light propagates.
Waveguides as Optical Wires
In an integrated photonic chip, waveguides act as the optical equivalent of copper traces on a traditional electronic circuit board. Typically etched into silicon or silicon nitride on a chip, a waveguide confines light within a high-refractive-index core surrounded by a lower-refractive-index cladding through total internal reflection.
To represent a vector \(\mathbf{x} = [x_1, x_2, \dots, x_N]^T\), a laser source is split into \(N\) parallel waveguides. The value of each element \(x_i\) is encoded into the optical signal—most commonly by modulating the amplitude (intensity) or phase of the light wave traveling down the \(i\)-th waveguide. Because light waves of different wavelengths can travel through the same waveguide simultaneously without interfering with one another, photonic chips can also use wavelength-division multiplexing to process multiple data channels in parallel.
Mach-Zehnder Interferometers as Programmable Weights
A Mach-Zehnder interferometer (MZI) is the fundamental building block for performing multiplication and addition in a photonic processor. An MZI consists of two 50:50 directional couplers (or beam splitters) connected by two parallel waveguide arms, with phase shifters placed on the arms.
When light enters the two input ports of an MZI, the first directional coupler splits and combines the signals. As the light travels through the two internal arms, thermo-optic or electro-optic phase shifters apply controlled phase delays \(\theta\) and \(\phi\). The second directional coupler then recombines the waves, causing them to interfere constructively or destructively depending on the phase difference.
Mathematically, an ideal lossless MZI performs a \(2 \times 2\) unitary transformation \(U_{\text{MZI}}\) on the two input optical fields:
\[U_{\text{MZI}}(\theta, \phi) = \frac{1}{2} \begin{pmatrix} e^{i\phi}(e^{i\theta} - 1) & i e^{i\phi}(e^{i\theta} + 1) \\ i(e^{i\theta} + 1) & 1 - e^{i\theta} \end{pmatrix}\]
By adjusting \(\theta\) and \(\phi\), the MZI routes specific proportions of light between its two output ports, effectively multiplying the input vector by a programmable \(2 \times 2\) matrix.
Building Large Matrix Multipliers
To multiply larger vectors by an \(N \times N\) matrix, photonic chips arrange meshes of MZIs in structured grids, such as the Reck or Clements architectures. Any \(N \times N\) unitary matrix \(U\) can be decomposed into a sequence of \(2 \times 2\) unitary transformations implemented by individual MZIs:
\[U = D \prod_{(m,n)} T_{m,n}(\theta_{m,n}, \phi_{m,n})\]
where \(D\) is a diagonal matrix of phase shifts and \(T_{m,n}\) represents the MZI acting on waveguides \(m\) and \(n\).
Because arbitrary matrices used in machine learning and signal processing are often non-unitary, photonic processors use Singular Value Decomposition (SVD) to express any real or complex matrix \(M\) as:
\[M = U \Sigma V^\dagger\]
In hardware, this requires two MZI meshes to implement the unitary matrices \(U\) and \(V^\dagger\), separated by a column of optical attenuators or amplifiers that apply the diagonal scaling matrix \(\Sigma\).
Why Photonic Linear Algebra Achieves Low Latency
Traditional electronic processors like GPUs perform matrix multiplication using clock-driven digital logic, where data must be fetched from memory, multiplied, accumulated, and written back over many clock cycles. In contrast, a photonic MZI mesh computes the entire matrix-vector product \(\mathbf{y} = M\mathbf{x}\) in a single pass.
Once the phase shifters are configured to represent the matrix weights, the computation happens passively as the light travels from the input waveguides to the output photodetectors. The latency is determined solely by the physical time of flight of light through the chip—typically on the order of tens of picoseconds—rather than clock frequency. Additionally, because waveguides experience very little resistive heating compared to electrical interconnects, photonic chips can sustain high-bandwidth linear algebra with significantly lower energy consumption per operation.