How Do ADCs Sample and Quantize Sensor Voltages?

Analog-to-Digital Converters (ADCs) bridge the physical world and classical computing by transforming continuous analog voltages from sensors into discrete binary numbers. This conversion happens through two primary stages: sampling the signal at regular time intervals and quantizing the measured voltage into finite amplitude levels. Once quantized, each level is encoded into a binary word that a microprocessor can store, process, and analyze.

Sampling in Time

A physical sensor, such as a microphone, thermocouple, or photodiode, produces a voltage \(V(t)\) that varies continuously over time. Because a digital computer cannot store an infinite number of data points, an ADC must measure the voltage at discrete, evenly spaced instants.

This process is governed by a sample-and-hold circuit. At each tick of a system clock, a switch briefly closes to charge a capacitor to the current input voltage, then opens to hold that voltage steady while the rest of the conversion takes place. The rate at which these snapshots occur is the sampling frequency \(f_s\), measured in Hertz (Hz), with a sampling period of:

\[T_s = \frac{1}{f_s}\]

To accurately reconstruct the original signal without distortion, the sampling rate must satisfy the Nyquist-Shannon sampling theorem. This theorem states that the sampling frequency must be at least twice the highest frequency component \(f_{\max}\) present in the analog signal:

\[f_s \ge 2 f_{\max}\]

If \(f_s\) is too low, higher-frequency components fold back into lower frequencies, a distortion known as aliasing. Engineers prevent this by placing an analog low-pass anti-aliasing filter before the ADC input.

Quantization in Amplitude

After sampling holds the voltage steady for a moment, the ADC must map that continuous voltage to one of a finite set of discrete levels. This step is called quantization.

An ADC has a defined input voltage range, from a minimum reference \(V_{\text{min}}\) to a maximum reference \(V_{\text{max}}\), giving a full-scale range of \(V_{\text{FS}} = V_{\text{max}} - V_{\text{min}}\). The number of discrete levels available depends on the ADC's resolution, specified in bits (\(N\)). An \(N\)-bit ADC divides the full-scale range into \(2^N\) distinct steps.

The voltage difference between two adjacent levels is the quantization step size, or Least Significant Bit (LSB) voltage, denoted as \(\Delta\):

\[\Delta = \frac{V_{\text{FS}}}{2^N}\]

For example, a 12-bit ADC with a \(0\text{ V}\) to \(3.3\text{ V}\) range has \(2^{12} = 4096\) levels, resulting in a step size of \(\Delta \approx 0.806\text{ mV}\). Any input voltage falling between two steps is rounded to the nearest discrete level. This rounding introduces an unavoidable discrepancy called quantization error, which is bounded between \(-\frac{\Delta}{2}\) and \(+\frac{\Delta}{2}\) for an ideal ADC.

Binary Encoding

Once the sampled voltage is assigned to a specific quantization level \(k\) (where \(k\) is an integer from \(0\) to \(2^N - 1\)), the ADC encodes that integer into an \(N\)-bit binary word. For an unipolar ADC starting at \(0\text{ V}\), the digital output code \(D\) is approximately:

\[D = \text{round}\left(\frac{V_{\text{in}}}{\Delta}\right)\]

This binary output is then transmitted to a microcontroller or processor over a parallel bus or a serial interface such as SPI or I2C, where it becomes standard digital data.

Common ADC Architectures

Different applications balance speed, resolution, and power consumption using specialized ADC designs:

  • Successive Approximation Register (SAR): Uses a binary search algorithm with an internal Digital-to-Analog Converter (DAC) and a comparator to determine each bit from most significant to least significant. SAR ADCs are common in microcontrollers for medium-speed, medium-to-high-resolution tasks.
  • Flash (Parallel) ADC: Uses a bank of \(2^N - 1\) comparators operating simultaneously to convert the voltage in a single clock cycle. Flash ADCs are the fastest type, suited for high-frequency applications like oscilloscopes, though they consume significant power and chip area at higher bit depths.
  • Sigma-Delta (\(\Sigma\Delta\)) ADC: Oversamples the signal at a very high rate and uses noise shaping and digital filtering to achieve high resolution (often 16 to 24 bits) at lower bandwidths, making it ideal for audio and precision sensor measurements.