State Assignment: One-Hot vs Binary Encoding
In digital logic design, state assignment is the process of mapping unique binary patterns to the symbolic states of a Finite State Machine (FSM). This article explains the fundamentals of state assignment and directly compares two primary implementation strategies: binary encoding and one-hot encoding. It details how each approach utilizes hardware resources, affects clock speed, and dictates design choices in field-programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs).
What is State Assignment?
When designing a sequential circuit such as a Finite State Machine,
designers start with abstract, named states (e.g., IDLE,
READ, WRITE, DONE). Because
digital hardware operates exclusively on binary signals, each abstract
state must be assigned a unique combination of binary values.
State assignment determines how many flip-flops (registers) are needed to store the current state and dictates the complexity of the combinational logic required to compute the next state and system outputs. The chosen assignment strategy significantly impacts the circuit’s maximum operating frequency, silicon area, and power consumption.
Binary Encoding
Binary encoding represents states using standard base-2 binary
numbers. Each state is assigned a sequential binary code (e.g.,
00, 01, 10, 11).
- Flip-Flop Requirement: For a machine with \(N\) states, binary encoding requires \(\lceil \log_2 N \rceil\) flip-flops. For example, an 8-state FSM requires only 3 flip-flops.
- Logic Complexity: Because the state bits are compressed, decoding the current state and generating next-state transitions requires multi-input combinational logic gates. As the number of states increases, this decoding logic becomes deeper and more complex.
- Best Use Cases: Binary encoding is ideal when flip-flops are expensive in terms of silicon area, such as in custom ASIC designs, or when the number of states is small.
One-Hot Encoding
One-hot encoding assigns a dedicated flip-flop to every individual
state in the FSM. In this scheme, only one flip-flop holds a logical
high (1) at any given moment, while all other flip-flops
remain logical low (0). For an 8-state machine, the states
are represented as 00000001, 00000010,
00000100, and so on.
- Flip-Flop Requirement: An \(N\)-state machine requires exactly \(N\) flip-flops. An 8-state machine requires 8 flip-flops.
- Logic Complexity: Because each state corresponds to
a single active bit, decoding the current state requires virtually no
combinational logic. Determining whether the system is in a specific
state simply requires checking if that state’s dedicated flip-flop
output is
1. This drastically simplifies next-state and output logic. - Best Use Cases: One-hot encoding is widely used in FPGA architectures, which are register-rich and feature built-in lookup tables (LUTs). It is also preferred in high-speed designs where minimizing gate delays is critical to achieving high clock frequencies.
Key Differences
| Feature | Binary Encoding | One-Hot Encoding |
|---|---|---|
| Flip-Flops Required | \(\lceil \log_2 N \rceil\) | \(N\) |
| Combinational Logic Depth | Higher (more gate levels) | Lower (minimal decoding logic) |
| Operating Speed | Slower due to logic propagation delay | Faster due to shallow logic paths |
| Power Consumption | Multiple bits can toggle at once | Typically two bits toggle per transition |
| Target Architecture | ASICs and resource-constrained systems | FPGAs and high-speed digital pipelines |
| Illegal State Detection | Harder to detect unused states | Easier to detect (any state with \(\neq 1\) high bit is invalid) |
Choosing between one-hot and binary encoding involves a trade-off between register count and combinational logic complexity. Binary encoding minimizes state storage at the expense of speed and logic depth, whereas one-hot encoding trades additional flip-flops for simpler logic, lower propagation delay, and faster operating frequencies.