Representing Negative Fractions in Fixed-Point Binary

This article provides an overview of how negative fractions are represented in binary using two’s complement fixed-point arithmetic. Fixed-point representation places an implicit radix point between integer and fractional bits, while two’s complement assigns a negative weight to the most significant bit (MSB). By applying the standard two’s complement process—inverting all bits and adding one to the least significant bit—fixed-point systems seamlessly represent negative fractional values using standard integer hardware logic.

Understanding Fixed-Point Representation

Fixed-point arithmetic reserves a predetermined number of bits for the integer part and the fractional part of a number. This structure is often written in \(Qm.n\) notation, where \(m\) is the number of integer bits (including the sign bit) and \(n\) is the number of fractional bits.

The radix point does not exist physically in hardware; it is maintained conceptually by software or circuit architecture.

• The bits to the left of the radix point represent non-negative powers of two: \(2^0, 2^1, 2^2, \dots\)
• The bits to the right represent negative powers of two: \(2^{-1} (0.5), 2^{-2} (0.25), 2^{-3} (0.125), \dots\)

Two’s Complement with Fractional Bits

In standard two’s complement integers, the most significant bit carries a negative weight. Fixed-point arithmetic uses the exact same principle.

For a \(Q1.n\) format with 1 sign bit and \(n\) fractional bits: * The MSB represents \(-2^0 = -1\). * Subsequent bits \(b_1, b_2, \dots, b_n\) represent \(+2^{-1}, +2^{-2}, \dots, +2^{-n}\).

The decimal value of a bit sequence \(b_0 . b_1 b_2 \dots b_n\) is computed as:

\[\text{Value} = -b_0 \cdot 2^0 + \sum_{i=1}^{n} b_i \cdot 2^{-i}\]

If the MSB is 0, the value is positive or zero. If the MSB is 1, the negative weight is activated, producing a negative value when summed with the positive fractional bits.

Step-by-Step Conversion: Representing \(-0.625\)

To represent a negative fraction such as \(-0.625\) in a 4-bit fixed-point format (\(Q1.3\)):

1. Represent the Positive Magnitude

Convert \(+0.625\) into binary: * \(0.5 (2^{-1}) + 0.125 (2^{-3}) = 0.625\) * Binary: 0.101

2. Invert the Bits (One’s Complement)

Flip every bit across the entire number, ignoring the position of the radix point: * 0.101 becomes 1.010

3. Add One to the Least Significant Bit (LSB)

Add \(1\) to the smallest fractional position (\(2^{-3}\) or \(0.001_2\)): * 1.010 + 0.001 = 1.011

4. Verify the Result

Evaluate 1.011 using weighted positional values: * MSB (\(b_0\)): \(1 \times (-2^0) = -1.0\) * Bit 1 (\(b_1\)): \(0 \times 2^{-1} = 0.0\) * Bit 2 (\(b_2\)): \(1 \times 2^{-2} = +0.25\) * Bit 3 (\(b_3\)): \(1 \times 2^{-3} = +0.125\) * Total sum: \(-1.0 + 0.25 + 0.125 = -0.625\)

Arithmetic Advantages

Because the radix point is fixed and uniform across operations, digital signal processors (DSPs) and basic ALUs can perform addition and subtraction on negative fixed-point fractions using identical circuitry designed for standard integers. No special handling for signs or decimal points is required at the hardware level.