How Pulse-Width Modulation Converts Binary to Analog

Pulse-width modulation (PWM) is a digital technique used to control analog devices by rapidly switching a direct current (DC) signal between fully on and fully off states. By varying the proportion of time the signal remains high relative to its total period, microcontrollers can translate discrete binary numbers into a proportional average voltage. This article covers the fundamental mechanics of PWM, how digital counters map binary values to duty cycles, and how physical loads filter these rapid pulses into continuous analog behavior.

What Is Pulse-Width Modulation?

Digital microcontrollers operate in binary states—outputting either a logic low (0V) or a logic high (typically 3.3V or 5V). Because digital pins cannot inherently output intermediate voltages (such as 2.5V), they simulate variable voltage using PWM.

A PWM signal is a high-frequency square wave characterized by two main parameters: * Frequency: How many switching cycles occur per second, measured in Hertz (Hz). * Duty Cycle: The percentage of one complete cycle during which the signal remains at the high logic level.

The Role of Duty Cycle in Calculating Average Voltage

The effective voltage delivered to a load depends entirely on the duty cycle. The mathematical relationship is:

\[\text{Duty Cycle (\%)} = \left(\frac{T_{\text{on}}}{T_{\text{total}}}\right) \times 100\]

\[\text{Average Voltage } (V_{\text{avg}}) = V_{\text{max}} \times \left(\frac{\text{Duty Cycle}}{100}\right)\]

For a 5V system: * 0% Duty Cycle: Signal is always 0V \(\rightarrow\) \(V_{\text{avg}} = 0\text{V}\) * 25% Duty Cycle: Signal is 5V for 25% of the time \(\rightarrow\) \(V_{\text{avg}} = 1.25\text{V}\) * 50% Duty Cycle: Signal is 5V for 50% of the time \(\rightarrow\) \(V_{\text{avg}} = 2.5\text{V}\) * 100% Duty Cycle: Signal is always 5V \(\rightarrow\) \(V_{\text{avg}} = 5\text{V}\)

Translating Binary Values to Duty Cycles

Microcontrollers use internal hardware timers and comparators to convert digital numbers from software into physical PWM duty cycles:

  1. Resolution: The resolution of a PWM channel determines how finely the duty cycle can be adjusted. An 8-bit resolution provides \(2^8 = 256\) discrete levels (0 to 255), while a 10-bit resolution provides \(2^{10} = 1024\) levels (0 to 1023).
  2. The Counter Register: A hardware timer increments a counter continuously from 0 up to its maximum value, resetting back to 0 at the end of each period.
  3. The Compare Register: A target binary value is stored in a comparator register. For example, in an 8-bit system:
    • Binary 00000000 (Decimal 0) sets a 0% duty cycle.
    • Binary 10000000 (Decimal 128) sets a ~50% duty cycle (\(128 / 255\)).
    • Binary 11111111 (Decimal 255) sets a 100% duty cycle.
  4. Signal Generation: As long as the timer counter is below the value in the compare register, the output pin stays high (1). Once the counter exceeds that value, the output drops to low (0) until the counter resets.

Driving Analog Loads

Analog loads respond to the average electrical power delivered over time rather than the discrete high-speed pulses, acting as natural low-pass filters: