How NRZ Line Coding Converts Voltage to Binary

Non-Return-to-Zero (NRZ) line coding is a fundamental digital data transmission method that maps binary digits directly to distinct electrical voltage levels. Unlike coding schemes that return to a neutral or zero-voltage state between consecutive bits, NRZ maintains a continuous, constant voltage throughout the entire duration of a bit interval. This article explains the mechanisms behind NRZ encoding, how electrical signals represent binary data, the primary variants of NRZ, and how receiving hardware decodes these voltages back into digital ones and zeros.

The Mechanism of Voltage-to-Binary Mapping

In digital communication, hardware interfaces transmit data over physical mediums using electrical potentials (voltages). NRZ encoding establishes a direct relationship between a discrete bit time—the clock period allocated to a single bit—and a specific voltage state.

NRZ line coding operates on two primary voltage configurations:

• Unipolar NRZ: Uses a positive voltage (such as \(+5\text{V}\) or \(+3.3\text{V}\)) to represent one binary state and zero volts (\(0\text{V}\)) to represent the other.
• Bipolar (Polar) NRZ: Uses two symmetrical, non-zero voltages around a ground reference, typically positive voltage (\(+V\)) for one binary state and negative voltage (\(-V\)) for the other.

Because the signal level does not drop to zero in the middle of a bit period, the signal utilizes the available bandwidth efficiently compared to Return-to-Zero (RZ) schemes.

Major NRZ Variants

NRZ translates binary data into voltages using two main mapping strategies:

1. NRZ-Level (NRZ-L)

In NRZ-L, the physical voltage level itself defines the binary value: * Binary 0: Represented by a specific voltage level (e.g., positive voltage in polar NRZ). * Binary 1: Represented by the opposite voltage level (e.g., negative voltage in polar NRZ).

The receiver reads the absolute state of the voltage during the clock cycle. If the line holds a high voltage, it interprets it as one predetermined bit; if it drops to a low voltage, it interprets it as the opposite bit.

2. NRZ-Inverted (NRZ-I)

In NRZ-I, the translation depends on voltage transitions rather than static levels: * Binary 1: Signaled by a transition (change from high-to-low or low-to-high) at the beginning of the bit interval. * Binary 0: Signaled by the absence of a transition; the voltage remains at whatever level it was during the previous bit.

NRZ-I reduces errors caused by polarity reversal in physical wiring, as the system detects state changes rather than absolute voltage levels.

How Receivers Decode the Signal

The receiving hardware reconstructs the original binary stream through the following process:

1. Clock Synchronization: The receiver uses an internal clock synchronized with the transmitter to sample the incoming signal at regular bit intervals (\(T_b\)).
2. Voltage Thresholding: The signal passes through a comparator circuit configured with a threshold voltage (\(V_{th}\)). For bipolar signals, the threshold is typically \(0\text{V}\).
3. Sampling and Decision: At the midpoint of each bit interval, the comparator evaluates the incoming voltage:
   • If \(V_{in} > V_{th}\), the decision circuit outputs a logic state (e.g., binary 0 or 1 depending on the standard).
   • If \(V_{in} < V_{th}\), the decision circuit outputs the alternate logic state.
4. Bitstream Reconstruction: The sequential outputs from each clock cycle are fed into a register, successfully translating the continuous physical waveform back into discrete binary data.

Advantages and Limitations

NRZ is simple to implement and minimizes bandwidth requirements because it requires at most one signal transition per bit. However, long sequences of identical bits (such as consecutive zeros or ones) result in a flat DC signal without transitions. This can cause baseline wander and make it difficult for the receiver’s clock to maintain synchronization without additional encoding techniques such as bit stuffing or scramblers.