AV1 IntraBC Motion Compensation and Safe Zones

Intra Block Copy (IntraBC) in AV1 allows blocks to reference previously reconstructed pixels within the same frame, which is particularly effective for screen content. To ensure that hardware decoders operate reliably and parallel decoding pipelines remain uninterrupted, AV1 enforces strict mathematical constraints on IntraBC displacement vectors. These constraints confine references to designated "safe zones," preventing decoders from referencing unconstructed pixels, violating tile boundaries, or exceeding on-chip memory limits.

Tile Boundary and Coordinate Clamping

IntraBC treats the current tile as an isolated decoding unit. A displacement vector (block vector) must point entirely within the spatial boundaries of the active tile. The AV1 specification explicitly invalidates any vector whose target block coordinates extend past the top, left, bottom, or right edges of the current tile. Because IntraBC operates strictly with integer-pixel accuracy, decoders avoid fractional-pixel interpolation filters, simplifying boundary enforcement to coordinate comparisons.

Causality and Scan-Order Protection

Decoders process blocks sequentially in raster-scan order across superblocks (typically 64x64 or 128x128 pixels), and in recursive quad-tree/bintree partitions within each superblock. To maintain causality, a block vector cannot point to pixels that have not yet been reconstructed.

The reference area must belong to:

Any vector directing the prediction window to the right of or below the current block’s processing front is illegal.

Hardware Buffer and Wavefront Constraints

Beyond simple raster-scan causality, AV1 defines safe zones to accommodate pipelined hardware architectures and multi-threaded decoders using Wavefront Parallel Processing (WPP). Reading samples that were just reconstructed can create a data hazard in hardware pipelines.

To mitigate this, AV1 applies specific spatial exclusion masks:

  1. Wavefront Lag: In multi-threaded environments, superblocks in row \(N\) are decoded alongside superblocks in row \(N-1\) with a staggered delay. IntraBC vectors are constrained so that references to the row above do not exceed the guaranteed completion boundary of the preceding thread.
  2. Local SRAM Limits: Hardware decoders store reconstructed samples in dedicated on-chip memory rather than off-chip DRAM to maintain high memory bandwidth. The AV1 specification limits the searchable reference area to a rolling local memory window—often restricted to the current superblock and a predefined number of adjacent reconstructed blocks—ensuring the reference samples fit into standard on-chip line buffers.

Bitstream Syntax Enforcement

These restrictions are enforced deterministically at the bitstream level. Decoders validate the displacement vector immediately after parsing. If a vector references a region outside the tile boundary, inside an incomplete coding block, or within an excluded pipeline buffer zone, the bitstream is flagged as non-conforming, ensuring decoders never attempt to read out-of-bounds or non-existent pixel memory.